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Re: [Phys-L] standard dc circuits

Let's restart this thread from the beginning:

On 11/22/2013 12:11 PM, Paul Lulai wrote:

If all wires are of the same material, diameter, length (and so on)
why is the current less in the parallel branches than in the wires
before and after the parallel branch? Does something make the field
in the parallel branches smaller than the field in the series portion
before and after the parallel branch?

1) Always start by drawing the circuit diagram. You'd be amazed the
number of times naïve students try to work the problem in their head,
in situations where world-class engineers would start by drawing the
diagram.

2) If you think there is a relevant parasitic capacitance or parasitic
inductance somewhere, draw it explicitly.

It takes some skill to know which of the possible parasitics are worth
worrying about. Generally you have to put in a whole bunch and do the
calculations to figure out which subset is actually important.

To save time in this example, I am going to drop a huge hint: It is
important to consider the parasitic capacitor shown in red in this
diagram:
http://www.av8n.com/physics/img48/series-parallel-rc.png

3) Note that by drawing explicit parasitics, we wind up with a new
circuit diagram that upholds Kirchhoff's laws. This is a Big Deal
in situations where the original circuit diagram did not uphold
Kirchhoff'ss laws. In this case:
-- black part of diagram = original = violates Kirchhoff's laws
-- red+black together = new & improved = upholds Kirchhoff's laws

This is the general pattern with Kirchhoff's laws: There is nothing
in physics that requires these so-called "laws" to be true ... but
you can often /make/ them more-or-less true by suitable engineering.

4) In the steady state, i.e. in the DC limit, this circuit has

V3 - V2 2
--------- = ---
V3 - v1 3

and

V2 - V1 1
--------- = ---
V3 - v1 3

as you can easily calculate using the usual voltage-divider formula,
which you can easily derive from Ohm's law. The capacitor is irrelevant
at DC.

5) We are still left with the original question: How does the current
know what to do?

Well, let's consider the hypothesis that node 2 was at the wrong voltage.
Suppose it was too low. Then by Ohm's law, relatively more current is now
flowing into the node from above, via the 1R branch, relative to the
steady-state situation. At the same time, relatively less current is
flowing out downward, via the R||R branch. The incoming net current
is charging up the capacitor, causing the voltage V2 to increase. This
process continues until, asymptotically, V2 converges to the correct
steady-state voltage.

You can even calculate how long this takes. The approach to the steady-
state voltage is a decaying exponential, with a time constant of RC/3.

6) Now repeat the analysis with a smaller capacitor. You get the same
result, only with a faster time constant. Now make the capacitor even
smaller. You can see where this is going. With reasonable-sized resistors
and a verrry small parasitic capacitance, V2 settles verrry quickly to
the correct steady-state voltage ... so quickly that you don't even notice
that the circuit has any dynamics at all.

7) This tells us something about the concept of DC circuit. It does *not*
mean that everything that happens in the circuit is slow. Rather, it
means that all the stuff we care about is slow compared to the natural
dynamics of the circuit, and in particular compared to the parasitics in
the circuit.

So really it is quite ironic: In a very important sense there is no such
thing as a DC circuit. The circuit itself needs to be /fast/. It is only
the observers who are slow. If the observers are slow compared to the
natural timescale of the circuit, then we say we are operating in the DC
limit.

=========================================

Philosophical and pedagogical remarks:

*) It is entirely possible to answer the original question using macroscopic
circuit ideas ... at least if we supplement the original circuit with an
explicit parasitic capacitance.

*) This is the approach I recommend for the introductory high-school physics
course. The idea of charge on the parasitic capacitance is non-specific as
to the exact location of the charge, which is not a problem. Specificity
is not required.

It is /obviously/ non-specific, which means that no misconceptions are being
created. Indeed, I consider non-specificity to be an eeeeenormous improvement
over drawing specific /but inaccurate/ distributions of steering charges.

"Never express yourself more clearly than you are able to think."
-- Niels Bohr

*) This is the approach that any sane engineer would take: Original
circuit plus parasitics. This approach is not original with me; I got
it from Ralph Morrison, who got a degree in physics from some small trade
school in Pasadena and then went on to work as a consulting engineer,
solving grounding and shielding problems, involving everything from
ultra-high-power radio transmitters to ultra-sensitive neurophysiology
instrumentation. He has written a bunch of books:
http://www.amazon.com/Ralph-Morrison/e/B001IXN0HS/ref=sr_tc_2_0?qid=1386205039&sr=1-2-ent


*) It is virtually always better to learn the recommended approach first.
Later there will be plenty of time to spiral back and learn why the
deprecated approaches are deprecated. In this case I *did* recommend
the macroscopic black-box engineering approach first, although I did
not draw the diagram including the parasitic capacitor.

I remarked that I thought that fussing over the microscopic charge
distributions was not worth the trouble, especially in the introductory
high-school course, and that stirred up a tremendous discussion. I'm
sorry I even mentioned it. It would have been better to spend more time
emphasizing the recommended approach.