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# [Phys-L] Fw: non-polarized capacitor

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From: Jeffrey Schnick <JSchnick@Anselm.Edu>
Sent: Wednesday, February 24, 2021 2:00 PM
To: John Denker
Subject: Re: [Phys-L] non-polarized capacitor

Sorry. Had I realized it wasn't a typo, I would have asked on phys‑l. By the way, I find this idea of using two electrolytic capacitors to make a non-polarized capacitor very cool. It is new to me.

I disagree with item 1 (where you write, "Certainly the node doesn't pick up any free charge Q") in your message below. Referring to your diagram, as viewed on my screen where one capacitor is depicted as being above the other, I define the central node (a.k.a. the central conductor) to be the conductor consisting of the upper plate of the lower capacitor, the lower plate of upper capacitor, and the wire connecting those to plates. I assume the frequency of the source to be low enough that, at any instant, all parts of that conductor can be considered to be at the same voltage. I define the upper conductor to consist of the upper plate of the upper capacitor, and the wire connecting that plate to the upper terminal of the voltage source. I treat the conductors in the circuit as being ideal and by the voltage of a conductor, I mean the voltage from ground to the conductor measured along a straight path. (I don't think the path matters in this case so I think that in this case the voltage is equal to the potential. Still, I don't think it hurts to specify the path.) I assume the two capacitors to be identical to each other. I am assuming that the voltage source provides a sinusoidally-varying voltage that oscillates about 0 volts with a maximum voltage of V_max (where V_max>0) and a minimum voltage of ‑V_max. I define the gorge of either capacitor to be the charge on the upper plate of that capacitor minus the charge on the lower plate of that capacitor, all divided by 2. Let Q be the amount of gorge that one of the capacitors would have to have for the voltage across that capacitor to be V_max. I am going to discuss the situation in a positive-charge‑carrier model, so when I talk about charge moving, being pushed here or there, or leaking, I am always talking about positive charge. When I talk about the voltage across one of the capacitors, I mean the voltage of the upper plate of that capacitor minus the voltage of the lower plate of that capacitor. I neglect the net charge of connecting wires.

If the two capacitors were ideal, initially un-gorged and uncharged capacitors, (rather than electrolytic capacitors), the central conductor would always remain neutral. Starting with the upper conductor at 0 volts, to make it have a higher voltage, the source would pull some positive charge from ground and push it onto the upper plate of the upper capacitor. This charge would repel the same amount of charge from the lower plate of the upper capacitor down into the upper plate of the lower capacitor. This charge on the upper plate of the lower capacitor would repel the same amount of charge from the lower plate into ground. When the upper conductor has voltage V_max, each capacitor has voltage V_max/2 and gorge Q/2. The net charge of the central conductor is zero. It has ‑Q/2 on its upper plate (the lower plate of the upper capacitor), 0 charge on its wire, and Q/2 on its lower plate (the upper plate of the lower capacitor). The voltage source then drives the voltage of the upper conductor to 0 by pulling charge from the upper conductor and pushing it to ground. When the voltage of the upper conductor is 0, the upper conductor is neutral, each of the four capacitor plates is neutral, and the gorge of each capacitor is zero. The voltage source then drives the voltage of the upper conductor to ‑V_max by pulling more charge from the upper conductor and pushing it to ground. When the upper conductor is at ‑V_max, the charge on the upper plate of the upper capacitor is ‑Q/2, the charge on the lower plate of the upper capacitor is Q/2, the charge on the upper plate of the lower capacitor is ‑Q/2 and the charge on the lower plate of the lower capacitor is Q/2. As the source voltage oscillates, charge surges up and down in the central conductor but the net charge of the central conductor remains 0.

In the case of the electrolytic capacitors, the way you depict them as being connected, in your diagram, during the initial phase, whenever the central conductor is at a higher voltage than ground, charge leaks from the upper plate of the lower capacitor to the lower plate of the lower capacitor, and, whenever the central conductor is at a higher voltage than the upper conductor, charge leaks from the lower plate of the upper capacitor to the upper plate of the upper capacitor. Note that in both cases, charge is leaking out of the central conductor. This makes the central conductor acquire a negative net charge. This leakage goes on until the voltage of the central conductor never gets to be higher than the voltage of the upper conductor and never gets to be higher than ground level. Leakage ceases when the net charge of the central conductor gets to be ‑Q. (At that stage, there are Q/e more electrons in the central conductor than there are protons in the central conductor.)

Starting with the source voltage at 0 and increasing, let's see what happens as the source voltage varies once the charge of the central conductor is ‑Q. We start with charge Q/2 on the upper plate of the upper capacitor, charge ‑Q/2 on the lower plate of the upper capacitor, charge ‑Q/2 on the upper plate of the lower capacitor, and charge Q/2 on the lower plate of the lower capacitor. This makes for gorge Q/2 on the upper capacitor and gorge ‑Q/2 on the lower capacitor. The voltage across the upper capacitor is V_max/2 and the voltage across the lower capacitor is ‑V_max/2 consistent with the fact that the upper conductor is at 0 volts. Now the voltage source starts pulling charge from ground and pushing it onto the upper conductor. To get the upper conductor up to V_max, it has to move Q/2 of charge onto the upper plate of the upper capacitor. This charge repels Q/2 of charge from the lower plate of the upper capacitor down into the upper plate of the lower capacitor where it repels Q/2 of charge from the lower plate of the lower capacitor down into ground. At this stage, the upper plate of the upper capacitor has charge Q, the lower plate of the upper capacitor has charge ‑Q, and both plates of the lower capacitor have 0 charge; the gorge of the upper capacitor is Q and the gorge of the lower capacitor is 0; the voltage across the upper capacitor is V_max and the voltage across the lower capacitor is 0. Now the voltage source starts pulling charge off of the upper conductor and pushing it to ground. When the voltage source output and the upper conductor are again at 0 volts we again have charge charge Q/2 on the upper plate of the upper capacitor, charge ‑Q/2 on the lower plate of the upper capacitor, charge ‑Q/2 on the upper plate of the lower capacitor, and charge Q/2 on the lower plate of the lower capacitor. The voltage source keeps pulling charge from the upper plate and pushing it to ground until the upper conductor is at ‑V_max. At that stage, the charge on the upper plate of the upper capacitor is 0, the charge on the lower plate of the upper capacitor is 0, the charge on the upper plate of the lower capacitor is ‑Q and the charge on the lower plate of the lower capacitor is Q. This means the gorge of the upper capacitor is 0 and the gorge of the lower capacitor is ‑Q making the voltage across the upper capacitor 0 and the voltage across the lower capacitor ‑V_max. Note that the voltage of the central conductor is the voltage across the lower capacitor so it oscillates about ‑V_max/2 with an ampitude of V_max/2.

The point is, that once the spurious leakage stops, from then on, the net charge of the central conductor is ‑Q. It has indeed acquired some free negative charge.

________________________________________
From: John Denker <jsd@av8n.com>
Sent: Tuesday, February 23, 2021 6:33 PM
To: Jeffrey Schnick
Subject: Re: [Phys-L] non-polarized capacitor

On 2/23/21 3:07 PM, you wrote:

"The floating node immediately picks up enough gorge to make it float
at a voltage" but by your definition of gorge, gorge is something
that a capacitor or a battery has, not something that a node has. Is
this just a typo?

I understand the question, and I understand why you ask.
We agree that it's unclear and confusing.

However I would argue that it's not wrong. Here's how I think
about it. Do you find any of these persuasive? Or does this

1) Certainly the node doesn't pick up any free charge Q.
So by process of elimination it has to be gorge.

2) Perhaps the simplest way to clarify it would be to cross
out what it says about gorge on the node, and instead say
that the two capacitors each pick up enough gorge to make
the floating node float at the required voltage.

During the initial transient, when the input voltage V is
high, the bottom capacitor leaks, putting gorge on the top
capacitor (but not the bottom), lowering Vc. When V is low,
the top capacitor leaks, putting gorge on the bottom capacitor
(but not the top), again lowering Vc.

3) I'm not sure I thought about it very clearly, but I think
the following complicated idea is what I had in mind:

The floating node has some capacitance to ground. Consider
the two (-) plates of the capacitors to be one side of a
double-sized capacitor, while the two (+) plates are the
other side. That is to say, the floating node sees two
capacitors in parallel. The input V is considered AC ground,
since we assume it is driven from a low-impedance source.

Leakage puts some gorge on this double-sized capacitor.

To make sense of this, you have to imagine each real capacitor
as an ideal capacitor plus some leakage. Beware that one
capacitor is leaking while the other is not, so the situation
is not symmetrical.