Re: [Phys-l] RC Discharge

[John Denker <jsd@av8n.com>]

I am worried about recent references to the capacitor plate
"with the positive charge".

The diagrams Bob posted at
  http://www.winbeam.com/~trebor/RC%20discharge.jpg
are absolutely correct because he labels the "Q" plate.

Similarly the words are technically correct because they
mention the "Q" plate ... but they are perhaps open to
misinterpretation because they also mention the plate
"with the positive charge".

The problem is that "positive charge" means something very
specific in electrostatics, and identifying something as
positively charged is nowhere near synonymous with identifying
it as the plate on which the capacitor's nominal charge is
stored.

Electrical engineers don't bother to label one of the plates
with a "Q" as Bob has done.  Instead they just choose a direction
and speak about the voltage drop across the capacitor in the
chosen direction, and the current flowing in the chosen
direction.

In the fairly-common case where one terminal of the capacitor
is tied to ground (or at least AC ground), the other terminal
obviously becomes "the" terminal of interest.  In this case
(and not otherwise) it is unambiguous to talk about current
flowing into (or out of) "the" capacitor.

  More generally, it is necessary to speak of current flowing
  into (or out of) a particular specified leg of the capacitor.

Bob's diagrams neither disclose nor solve the full range of
notational problems, because all of his examples show positive
absolute charge on the chosen "Q" plate.

It must be emphasized that in the context of capacitors, + and -
undoubtedly refer to absolute charge, not to what happens if
you draw charge out of "the" capacitor.  This is important in
connection with electrolytic capacitors.  If you get it wrong,
the capacitor won't work, and it might explode.  Guess how I
know.

Suppose I take 1 milliamp out of terminal "A" of a 1 microfarad
capacitor for 1 millisecond.  Then the voltage across the
capacitor (V := V_A - V_B) will decrease by one volt during
that time.  Note that I did not say anything about whether
plate "A" was positively charged at the beginning only, at
the end, or neither.

To say the same thing in different words, do *NOT* use a +
sign to indicate "Q lives here" because Q might be negative.
Instead, it is permissible (but unconventional) to use an
explicit "Q" as Bob has done ... and it is more conventional
to just pick one of the leads and label it as to current-in
or current-out.

Michael Edmiston wrote:

> > If we agree that Bob's analysis of his third circuit is correct, then 
> > the Serway/Jewitt analysis would certainly seem incorrect.  Can anyone 
> > look at Bob's third diagram and legitimize the Serway/Jewitt analysis?

I can, as follows:

Consider the + and - markings on the capacitor as _obiter dicta_ since
they don't have any real bearing on what follows.  This is a linear
circuit, and the polarity of the initial charge doesn't really matter.
That is, I am assuming a non-polar (non-electrolytic) capacitor.
This is an entirely appropriate simplification for beginning students.

Tie the bottom of the diagram to ground.  This is consistent (in the
weak sense) with standard practice when drawing circuit diagrams ...
i.e. not necessary, but common and completely unsurprising.

At this point our diagram is the same as Bob's #3, except that the Q
symbol has migrated to the top plate.  Equivalently it is the same
as #2 except that the capacitor was initially charged to a negative
voltage with respect to ground, so that we need to reverse the + and -
signs in #2 (or erase them completely, since they don't matter to
what follows).

Note that the current arrow into the top terminal of the capacitor is
consistent with the foregoing decisions, and consistent with conventional
notions of current "into" the capacitor.

This is consistent with Tim's notion of charge on the *"upper"* plate on
the capacitor ... but diametrically opposite to his choice of I being
the current *"out"* of the upper plate.

At this point, the equations are identical to Bob's equations for case #2.

I still haven't seen Serway's diagram, so I won't comment on whether
there might be ways of improving it.  But I see no evidence that it
is provably wrong, or inconsistent with his equations.

====================================================

I find Tim's suggestions to be a major step in the right direction:

> Let's explicitly write
>   q(U) = Net charge on upper plate
>   I = current out of the upper plate 
>   dq(U) = change in the charge of the upper plate in time dt.
>   dq(W) = charge moving past a point in the wire in the positive direction in time dt

However, they don't go quite far enough.  We still need a labelled
diagram in order to define what is "the positive direction" in the
wire.

Furthermore, although the ideas are sound and are adequate for the
ultra-simple circuit being discussed in this thread, stronger methods
are needed for more-complex circuits.

Therefore I (yet again) recommend DRAWING THE DIAGRAM and labelling
the things you care about ... not just the components, but the
current and voltage variables you intend to use in your equations.

This upholds the cherished principle of mean what you say, and say
what you mean.

If you want (I) to be the "current out of the upper plate", just draw
a little arrow on the wire coming out of the upper plate and label
it (I).  Then we know what (I) is, and we no longer even need to know
what is the "upper plate" ... indeed we can rotate to the capacitor
so that it doesn't even have an upper plate.